Sipeed USB-JTAG/TTL RISC-V Debugger (ST-Link V2 STM8/STM32 Simulator)

• Sipeed USB-JTAG/TTL RISC-V Debugger
• Features an ST-Link V2 STM8/STM32 Simulator
• Supports the full range of STM32 SWD debugging interface
• Offers a simple 4-wire interface (including power)

The Sipeed USB-JTAG/TTL RISC-V Debugger (ST-Link V2 STM8/STM32 Simulator) supports the full range of STM32 SWD debugging interface, a simple 4-wire interface (including power), fast, stable; interface definition housing directly marked!

No need to read the manual. Support the full range of STM8 SWIM download debugging (common development environments such as IAR, STVD, etc. are supported).